Technology Author: EqualOcean News, Xiwen Zheng Editor: Yuzhe Zhang Jun 03, 2021 03:46 PM (GMT+8)

The global chip giant is introducing the N6RF for enhanced 5G smartphone and WiFi 6/6e performance, N5A for state-of-the-art automotive applications, and enhancements across the range of 3DFabric technologies.

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On June 2, TSMC shared the latest technological progress in advanced logic technology, specialty technologies, and TSMC 3DFabric advanced packaging and chip stacking technologies.

It announced the following chip manufacturing processes enhancements at the event:

  • N5A: As the newest member is TSMC's 5nm family, it brings the same technology used by present-day supercomputers into vehicles. The N5A is equipped with N5's computing efficiency, power efficiency, and logic density while meeting the stringent quality and reliability requirements of AEC-Q100 Grade 2 and other automotive safety and quality standards. It also meets the strict quality and reliability requirements of aec-q100 grade 2, as well as extra automotive safety and quality standards. The chip aims to meet the increasing demand of automotive applications for computing power, such as AI-enabled driver assistance and the digitization of vehicle cockpits. It is expected to be available in the third quarter of 2022.

  • N6RF: Bringing the power, efficiency, and area advantages of the N6 logic process into 5G radio frequency (RF) and WiFi 6/6e solutions. Compared with the previous generation of 16nm RF technology, the performance of the N6RF transistor is improved by more than 16% over the previous generation. Moreover, N6RF provides significantly reduced power consumption and area for 5G RF transceivers for both sub-6 gigahertz and millimeter-wave spectrum bands while guaranteeing performance, features and battery life. The N6RF will also enhance WiFi 6/6e performance and power efficiency.

  • N3: Relying on the proven FinFET transistor architecture for the best performance, power efficiency, and cost-effectiveness, the speed of the N3 chip increased by 15%, the power consumption is reduced by 30%, and the logic density up by 70%, compared with N5 technology. TSMC's N3 technology is poised to be the world's most advanced technology when it begins volume production in the second half of 2022 in Fab 18 at Nanke.

  • N4: TSMC N4 development has proceeded smoothly since its announcement at the 2020 Technology Symposium, with risk production set for the third quarter of 2021, one quarter ahead of the previous plan.

In addition, TSMC disclosed the progress in the 3DFabric family of 3D silicon stacking and advanced packaging technologies.

  • High-Performance Computing (HPC) applications: TSMC will be offering larger reticle size for both its InFO_oS and CoWoS packaging solutions in 2021, enabling larger floor plans for chipset and high-bandwidth memory integration.

  • Mobile applications: TSMC is introducing its InFO_B solution, designed to integrate a powerful mobile processor in a slim, compact package with enhanced performance and power efficiency and support mobile device makers' DRAM stacking on the package.

According to Dr. Wei, the company has invested USD 12 billion to build a 300 mm wafer plant in Phoenix, Arizona. At this stage, the construction project remains on track. The plant is expected to start mass production of 5 nm process chips in 2024, with a monthly capacity of about 20000 chips. By the end of 2022, TSMC will have five dedicated 3D fabric fabs.

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